@string{ apchdl1 = "Proceedings of the 1st Asia Pacific Conference on HDL Standards and Applications" }

@string{ apchdl2 = "Proceedings of the 2nd Asia Pacific Conference on HDL Standards and Applications" }

@string{ cacm = "Communications of the ACM" }

@string{ cicc = "Proceedings of the IEEE Custom Integrated Circuits Conference" }

@string{ edac = "Proceedings of the European Design Automation Conference" }

@string{ edtc = "Proceedings of the European Design and Test Conference" }

@string{ date = "Proceedings of the Design Automation and Test Conference in Europe" }

@string{ iccd = "Proceedings of the International Conference on Computer Design" }

@string{ iccad = "Proceedings of the International Conference on Computer-Aided Design" }

@string{ isss8 = "Proceedings of the 8th International Symposium on System Synthesis" }

@string{ isss = "Proceedings of the International Symposium on System Synthesis" }

@string{ tcomputer = "IEEE Transactions on Computer" }

@string{ tcad = "IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems" }

@string{ tvlsi = "IEEE Transactions on Very Large Scale Integration (VLSI) Systems" }

@string{ jint = "Integration, The VLSI Journal" }

@string{ dac22 = "Proceedings of the 22nd Design Automation Conference" }

@string{ dac23 = "Proceedings of the 23rd Design Automation Conference" }

@string{ dac25 = "Proceedings of the 25th Design Automation Conference" }

@string{ dac26 = "Proceedings of the 26th Design Automation Conference" }

@string{ dac27 = "Proceedings of the 27th Design Automation Conference" }

@string{ dac28 = "Proceedings of the 28th Design Automation Conference" }

@string{ dac29 = "Proceedings of the 29th Design Automation Conference" }

@string{ dac30 = "Proceedings of the 30th Design Automation Conference" }

@string{ dac31 = "Proceedings of the 31st Design Automation Conference" }

@string{ dac32 = "Proceedings of the 32st Design Automation Conference" }

@string{ dac33 = "Proceedings of the 33st Design Automation Conference" }

@string{ dac34 = "Proceedings of the 34st Design Automation Conference" }

@string{ dac35 = "Proceedings of the 35st Design Automation Conference" }

@string{ codes = "Proceedings of the International Workshop on Hardware-Software Codesign" }

@string{ tsp = "IEEE Transactions on Signal Processing" }

@string{ jvlsisp = "Journal of VLSI Signal Processing" }

@string{ icassp = "International Conference on Acoustics, Speech, and Signal Processing" }

@string{ dac = "Design Automation Conference" }

@string{ i3etose = "IEEE Trans. Software Eng." }

@InCollection{ Hu,
	title = "Scheduling and Assignment in High Level Synthesis",
	booktitle = "High Level VLSI Synthesis",
	author = "W. Rosenstiel and H. Kramer",
	crossref = "book:Camposano-HLS",
	pages = "355--382"
}

@Book{ book:MicheliSynthOpt,
	author = "De Micheli, G.",
	title = "Synthesis and Optimization of Digital Circuits",
	publisher = "McGraw-Hill",
	year = "1994"
}

@Book{ book:Gajski-SpecDesign,
	author = "D. Gajski and F. Vahid and S. Narayan and J. Gong",
	title = "Specification and Design of Embedded Systems",
	publisher = "Prentice-Hall",
	year = "1994"
}

@Book{ book:Gajski-DigitalDesign,
	author = "D. D. Gajski",
	title = "Principles of Digital Design",
	publisher = "Prentice Hall",
	year = "1997"
}

@Book{ book:Rabaey-DigitalIC,
	author = "J. M. Rabaey",
	title = "Digital Integrated Circuits: A Design Perspective",
	publisher = "Prentice Hall",
	year = "1996",
	OPTedition = ""
}

@Book{ specc,
	author = "D. D. Gajski and J. Zhu and R. Domer and A. Gerstlauer and S. Zhao",
	title = "SpecC: Specification Language and Methodology",
	publisher = "Kluwer Academic Publishers",
	month = "January",
	year = "2000"
}

@Manual{ cynapps,
	title = "Cynlib Reference Manual",
	organization = "CynApps Inc.",
	address = "http://www.cynlib.com"
}

@Conference{ ocapi,
	author = "Vernalde, S. and Schaumont, P. and Bolsens, I.",
	title = "An Object Oriented Programming Approach for Hardware Design",
	booktitle = "IEEE Computer Society Workshop on VLSI",
	month = "April",
	year = "1999"
}

@Manual{ systemC,
	title = "SystemC Reference Manual",
	organization = "Synopsys Inc.",
	address = "http://www.systemc.org"
}

@TechReport{ HardwareC,
	author = "D. Ku and G. De Micheli",
	title = "{HardwareC} - {A} language for hardware design",
	institution = "Stanford University",
	year = "1988",
	number = "CSL-TR-90-419"
}

@Book{ book:Esterel,
	author = "G. Berry",
	title = "The Foundations of Esterel",
	journal = "Proof, Language and Interaction: Essays in Honour of Robin Milner",
	publisher = "MIT Press",
	year = "2000",
	note = "Editors: G. Plotkin, C. Stirling and M. Tofte"
}

@Book{ book:Argos,
	author = "N. Halbwachs",
	title = "Synchronous Programming of Reactive Systems",
	publisher = "Kluwer Academic",
	year = "1993"
}

@Book{ book:Navabi,
	author = "Z. Navabi",
	title = "VHDL: Analysis and Modeling of Digital Systems",
	publisher = "McGraw-Hill",
	year = "1993"
}

@Book{ Verilog,
	author = "D. Thomas and P. Moorby",
	title = "The Verilog Hardware Description Language",
	publisher = "Kluwer Academic",
	year = "1991"
}

@Article{ GuptaScenic97,
	author = "R. K. Gupta and S. Y. Liao",
	title = "Using a programming language for digital system design",
	journal = "IEEE Design and Test of Computers",
	year = "1997",
	OPTvolume = "",
	OPTnumber = "",
	OPTpages = "",
	month = "April"
}

@inproceedings{ specsyn_ecda94,
	author = "D.~Gajski and F.~Vahid and S.~Narayan",
	title = "A System-Design Methodology: Executable-Specification Refinement",
	booktitle = "Proceedings of the European Conference on Design Automation",
	year = "1994"
}

@InProceedings{ BerryCRP93,
	author = "G. Berry and S. Ramesh and R. Shyamasundar",
	title = "Communicating Reactive Processes",
	booktitle = "20th ACM Symp. on Principles of Programming Languages",
	year = "1993",
	month = "January"
}

@Article{ GajskiTVLSI96,
	author = "D. Gajski and S. Narayan and L. Ramachandran and F. Vahid and P. Fung",
	title = "System Design Methodologies: Aiming at the 100 h Design Cycle",
	journal = "IEEE Transactions on Very Large Scale Integration (VLSI) Systems",
	month = "March",
	year = "1996",
	volume = "4",
	number = "1"
}

@inproceedings{ paper:compare-models,
	author = "E.A.~Lee and A.~Sangiovanni-Vincenteli",
	title = "Comparing Models of Computation",
	booktitle = iccad,
	month = "November",
	year = "1996"
}

@article{ paper:model-csp,
	author = "C. A. R. ~Hoare",
	title = "Communicating sequential processes",
	journal = "Comm. of the ACM",
	volume = "21",
	number = "8",
	year = "1978"
}

@book{ book:model-ccs,
	author = "R. ~Milner",
	title = "Communication and Concurrency",
	publisher = "Prentice-Hall",
	address = "Englewood Cliffs, NJ",
	year = "1989"
}

@article{ paper:model-statecharts,
	author = "D.~Harel",
	title = "{StateCharts}: a Visual Formalism for Complex Systems",
	journal = "Science of Programming",
	volume = "8",
	year = "1987"
}

@inproceedings{ paper:model-compscharts,
	author = "M. von der ~Beeck",
	title = "A Comparison of {StateCharts} Variants",
	booktitle = "Proc. of Formal Techniques in Real Time and Fault Tolerant Systems",
	publisher = "Springer-Verlag",
	pages = "128-148",
	address = "Berlin",
	year = "1994"
}

@article{ paper:model-speccharts,
	author = "F. ~Vahid and S. ~Narayan and D. D. ~Gajski",
	title = "{SpecCharts}: A {VHDL} Front-End for Embedded Systems",
	journal = tcad,
	volume = "14",
	number = "6",
	pages = "694-706",
	month = "June",
	year = "1995"
}

@book{ book:model-de,
	author = "C. ~Cassandras",
	title = "Discrete Event Systems, Modeling and Performance Analysis",
	publisher = "Irwin",
	address = "Homewood IL",
	year = "1993"
}

@techreport{ report:model-hcfsm,
	author = "A. ~Girault and B. ~Lee and E. A. ~Lee",
	title = "Hierarchical Finite State Machines with Multiple Concurrency Models",
	month = "October",
	year = "1998",
	number = "UCB/ERL M97/57",
	institution = "Electronics Research Laboratory",
	address = "Berkeley, CA 94720"
}

@article{ model-Gajski-Ychart,
	author = "D. D. Gajski and R.H. Kuhn",
	title = "Guest Editor's Introduction: New {VLSI} Tools",
	journal = "{IEEE} {C}omputer",
	month = "December",
	year = "1983"
}

@book{ book:Polis,
	author = "F.~Balarin and P.~Giusto and A.~Jurecska and C.~Passerone and E.~Sentovich and B.~Tabbara and M.~Chiodo and H.~Hsieh and L.~Lavagno and A.~Sangiovanni-Vincentelli and K.~Suzuki",
	title = "Hardware-Software Co-Design of Embedded Systems, The {POLIS} Approach",
	publisher = "Kluwer Academic Publishers",
	month = "April",
	year = "1997"
}

@inproceedings{ Paper:CFSM,
	author = "M.~Chiodo and P.~Giusto and H.~Hsieh and A.~Jurecska and L.~Lavagno and A.~Sangiovanni-Vincentelli",
	title = "A Formal Specification Model for Hardware/Software Codesign",
	booktitle = "Proceedings of International Workshop on Hardware-Software Codesign",
	month = "October",
	year = "1993"
}

@inproceedings{ Paper:Chinook,
	author = "P.~Chou and R.~Ortega and G.~Borriello",
	title = "The {Chinook} Hardware/Software Co-Synthesis System",
	booktitle = "International Symposium on System Synthesis",
	address = "Cannes, France",
	month = "September",
	year = "1995"
}

@article{ Paper:ErnstCosynthesis,
	author = "R.~Ernst and J.~Henkel and T.~Benner",
	title = "Hardware-software cosynthesis for microcontrollers",
	journal = "IEEE Design and Test",
	volume = "12",
	year = "1993"
}

@article{ Article:Cosyma96,
	author = "R.~Ernst and others",
	title = "The {COSYMA} Environment for Hardware-Software Cosynthesis of Small Embedded Systems",
	journal = "Microprocessors and Microsystems",
	month = "May",
	year = "1996"
}

@inproceedings{ Chapter:Cosyma,
	author = "A.~Osterling and T.~Benner and R.~Ernst and D.~Herrmann and T.~Scholz and W.~Ye",
	title = "The {Cosyma} System",
	editor = "J.~Staunstrup and W.~Wolf",
	booktitle = "Hardware/Software Co-Design: Principles and Practice",
	publisher = "Kluwer Academic Publishers",
	year = "1997"
}

@inproceedings{ Paper:CoWare,
	author = "K.~Rompaey and D.~Verkest and I.~Bolsens and H.~De~Man",
	title = "{CoWare} -- A design environment for heterogeneous hardware/software systems",
	booktitle = "Proceedings of the European Design Automation Conference",
	year = "1996"
}

@article{ Paper:Ptolemy,
	author = "A.~Kalavade and E.~Lee",
	title = "A Hardware/Software Codesign Methodology for {DSP} Applications",
	journal = "IEEE Design and Test",
	month = "September",
	year = "1993"
}

@inproceedings{ Paper:Cosmos,
	author = "T.~Ismail and M.~Abid and A.~Jerraya",
	title = "{COSMOS}: A Codesign Approach for Communicating Systems",
	booktitle = "Proceedings of the International Workshop on Hardware-Software Codesign",
	publisher = "IEEE CS Press",
	year = "1994"
}

@misc{ Web:SpecC,
	key = "SpC",
	title = "{SpecC} System Home Page",
	howpublished = "http://www.cecs.uci.edu/{\textasciitilde}specc"
}

@inproceedings{ Paper:IP,
	author = "R.~Domer and D.~Gajski",
	title = "Reuse and Protection of Intellectual Property in the {SpecC} System",
	booktitle = "Proceedings of the Asia and South Pacific Design Automation Conference",
	address = "Yokohama, Japan",
	month = "January",
	year = "2000"
}

@inproceedings{ paper:codesign-ptolemy,
	author = "A. ~Kalavade and E. A. ~Lee",
	title = "Hardware/software co-design using {Ptolemy}, a case study",
	booktitle = "Proc. of the Int. Workshop on Hardware-Software Codesign",
	month = "October",
	year = "1992"
}

@article{ paper:codesign-cmu,
	author = "D.E. ~Thomas and J.K. ~Adams and H. ~Schmitt",
	title = "A model and methodology for hardware-software codesign",
	journal = "IEEE Design and Test of Computers",
	volume = "10",
	number = "3",
	pages = "6-15",
	year = "1993"
}

@article{ paper:codesign-polis,
	author = "M. ~Chiodo and P. ~Giusto and H. ~Hsieh and A. ~Jurecska and L. ~Lavagno and A. ~Sangiovanni-Vincentelli",
	title = "Hardware/software codesign of embedded systems",
	journal = "IEEE Micro",
	volume = "14",
	number = "4",
	pages = "26-36",
	month = "August",
	year = "1994"
}

@inproceedings{ chapter:codesign-cosyma,
	author = "A.~Osterling and T.~Benner and R.~Ernst and D.~Herrmann and T.~Scholz and W.~Ye",
	title = "The {Cosyma} System",
	editor = "J.~Staunstrup and W.~Wolf",
	booktitle = "Hardware/Software Co-Design: Principles and Practice",
	publisher = "Kluwer Academic Publishers",
	year = "1997"
}

@inproceedings{ chapter:codesign-cosmos,
	author = "C.~Valderrama and M.~Romdhani and J.~Daveau and G.~Marchioro and A.~Changuel and A.~Jerraya",
	title = "{Cosmos}: A Transformational Co-design tool for Multiprocessor Architectures",
	editor = "J.~Staunstrup and W.~Wolf",
	booktitle = "Hardware/Software Co-Design: Principles and Practice",
	publisher = "Kluwer Academic Publishers",
	year = "1997"
}

@inproceedings{ paper:cosim-gupta,
	author = "R.K. ~Gupta and C.N. ~Coelho Jr. and G. De Micheli",
	title = "Synthesis and simulation of digital systems containing interacting hardware and software components",
	booktitle = dac29,
	month = "June",
	year = "1992"
}

%End of \section{Hardware-Software Codesign}

@article{ paper:partition-gupta,
	author = "R.K. ~Gupta and G. De Micheli",
	title = "Hardware-Software Cosynthesis for Digital Systems",
	journal = "IEEE Design and Test of Computers",
	month = "September",
	year = "1993"
}

@inproceedings{ Paper:Cosyma97,
	author = "J.~Henkel and R.~Ernst",
	title = "A Hardware-Software Partitioner Using a Dynamically Determined Granularity",
	booktitle = "Proceedings of the Design Automation Conference",
	year = "1997"
}

@inproceedings{ Chapter:Lycos,
	author = "J.~Madsen and J.~Grode and P.~Knudsen",
	title = "Hardware/Software Partitioning using the {LYCOS} System",
	editor = "J.~Staunstrup and W.~Wolf",
	booktitle = "Hardware/Software Co-Design: Principles and Practice",
	publisher = "Kluwer Academic Publishers",
	year = "1997"
}

@inproceedings{ paper:ssyn-partition-vahid,
	author = "F.~Vahid and D.D.~Gajski",
	title = "Specification partitioning for system design",
	booktitle = dac29,
	month = "June",
	year = "1992"
}

@inproceedings{ paper:ssyn-partition-ernst,
	author = "R. ~Ernst and J. ~Henkel",
	title = "Hardware-software codesign of embedded controllers based on hardware extraction",
	booktitle = codes,
	mont = September,
	year = "1992"
}

@inproceedings{ paper:ssyn-partition-henkel1,
	author = "J. ~Henkel and T. ~Benner and R. ~Ernst",
	title = "Hardware generation and partitioning effects in the {COSYMA} system",
	booktitle = codes,
	mont = October,
	year = "1993"
}

@inproceedings{ paper:ssyn-partition-henkel2,
	author = "J. ~Henkel and R. ~Ernst and U. ~Holtmann and T. ~Benner",
	title = "Adaptation of partitioning and high-level synthesis in hardware/software co-synthesis",
	booktitle = iccad,
	year = "1994"
}

@article{ paper:ssyn-partition-olokuton,
	author = "K. Olokutun and R. ~Helaihel and J. ~Levitt and R. ~Ramirez",
	title = "A software-hardware cosynthesis approach to digital system simulation",
	journal = "IEEE Micro",
	volume = "14",
	number = "4",
	pages = "48-58",
	month = "August",
	year = "1994"
}

@inproceedings{ paper:ssyn-partition-kumar1,
	author = "S. ~Kumar and J.H. ~Aylor and B.W. ~Johnson and W.A. ~Wulf",
	title = "A framework for hardware software codesign",
	booktitle = codes,
	mont = September,
	year = "1992"
}

@inproceedings{ paper:ssyn-partition-kumar2,
	author = "S. ~Kumar and J.H. ~Aylor and B.W. ~Johnson and W.A. ~Wulf",
	title = "Exploring hardware/software abstractions and alternatives for codesign",
	booktitle = codes,
	mont = October,
	year = "1993"
}

@inproceedings{ paper:ssyn-partition-barros1,
	author = "E. ~Barros and W. ~Rosenstiel and X. ~Xiong",
	title = "Hardware/software partitioning with {UNITY}",
	booktitle = codes,
	mont = October,
	year = "1993"
}

@inproceedings{ paper:ssyn-partition-barros2,
	author = "E. ~Barros and A. ~Sampaio",
	title = "Towards provably correct hardware/software partitioning using {OCCAM}",
	booktitle = codes,
	mont = October,
	year = "1994"
}

@inproceedings{ paper:ssyn-partition-kalavade,
	author = "A. ~Kalavade and E.A. ~Lee",
	title = "A global criticality/local phase driven algorithm for the constrained hardware/software partitioning problem",
	booktitle = codes,
	mont = October,
	year = "1994"
}

@inproceedings{ paper:estimate-speed-polis,
	author = "K. ~Suzuki and A. ~Sangiovanni-Vincentelli",
	title = "Efficient software performance estimation methods for hardware/software codesign",
	booktitle = dac33,
	month = "June",
	year = "1996"
}

%End of \section{Partitioning}

@article{ paper:ssyn-sched-uw,
	author = "P. ~Chou and E.A. ~Walkup and G. ~Borriello",
	title = "Scheduling for reactive real-time systems",
	journal = "IEEE Micro",
	volume = "14",
	number = "4",
	pages = "37-47",
	month = "August",
	year = "1994"
}

@article{ GuDe97,
	author = "R.~K. Gupta and G. De Micheli",
	title = "Specification and Analysis of Timing Constraints for Embedded Systems",
	journal = tcad,
	year = 1997,
	volume = 16,
	number = 3,
	pages = "240--56",
	month = Mar
}

@inproceedings{ MaMaLi97,
	author = "S. Malik and M. Martonosi and Y.-T.~S. Li",
	title = "Static Timing Analysis of Embedded Software",
	booktitle = "Proc. 34st Design Automation Conf.",
	year = 1997,
	editor = "",
	pages = "147--52",
	organization = "ACM/IEEE",
	publisher = "",
	address = "",
	month = ""
}

@article{ Gu97,
	author = "R.~K. Gupta",
	title = "Special Issue on Partitioning Methods for Embedded Systems",
	journal = "Design Automation for Embedded Systems",
	year = 1997,
	volume = 2,
	number = 2,
	pages = "123--261",
	month = Mar
}

@article{ LiLa73,
	author = "C.~L. Liu and J.~W. Layland",
	title = "Scheduling Algorithms for Multiprogramming in a Hard Real-Time Environment",
	journal = jacm,
	year = 1973,
	volume = 20,
	number = 1,
	pages = "46--61",
	month = ""
}

@article{ MaDaGu98,
	author = "A. Mathur and A. Dasdan and R.~K. Gupta",
	title = "Rate Analysis of Embedded Systems",
	journal = "ACM Trans. on Design Automation of Electronic Systems",
	year = 1998,
	volume = 3,
	number = 3,
	pages = "408--36",
	month = Jul
}

@article{ DaRaGu98b,
	author = "A. Dasdan and D. Ramanathan and R.~K. Gupta",
	title = "A Timing-Driven Design and Validation Methodology for Embedded Real-Time Systems",
	journal = "ACM Trans. on Design Automation of Electronic Systems",
	year = 1998,
	volume = 3,
	number = 4,
	pages = "533--53",
	month = Oct
}

@article{ XuPa93,
	author = "J. Xu and D.~L. Parnas",
	title = "On Satisfying Timing Constraints in Hard Real-Time Systems",
	journal = i3etose,
	year = 1993,
	volume = 19,
	number = 1,
	pages = "70--84",
	month = Jan
}

@book{ book:burns-real-time,
	author = "A. Burns and A. Wellings",
	title = "Real-Time Systems and Their Programming Languages",
	publisher = "Addison Wesley",
	year = 1990,
	volume = "",
	series = "",
	address = "",
	edition = "",
	month = ""
}

@book{ book:kopetz-real-time,
	author = "H. Kopetz",
	title = "Real-Time Systems",
	publisher = "Kluwer Academic",
	year = 1997,
	volume = "",
	series = "",
	address = "Boston, MA, USA",
	edition = "",
	month = ""
}

@book{ KlRaPoOb93,
	author = "M.~H. Klein and T. Ralya and B. Pollak and R. Obenza",
	title = "A Practitioner's Handbook for Real-Time Analysis : Guide to Rate Monotonic Analysis for Real-Time Systems",
	publisher = "Kluwer Academic Publ.",
	year = 1993,
	volume = "",
	series = "",
	address = "Boston, MA, USA",
	edition = "",
	month = ""
}

@book{ book:Gomma-Sw-Design-Methods,
	author = "H. Gomaa",
	title = "Software Design Methods for Concurrent and Real-Time Systems",
	publisher = "Addison-Wesley",
	year = 1993,
	volume = "",
	series = "",
	address = "Reading, MA, USA",
	edition = "",
	month = ""
}

%End of \section{Timing Estimation and Scheduling}

@PhdThesis{ Girczyc-Thesis84,
	author = "E. Girczyc",
	title = "Automatic Generation of Micro-sequenced Data Paths to Realize {ADA} Circuit Descriptions",
	school = "Carleton University",
	year = "1984"
}

@inproceedings{ kowalski-85,
	author = "T. J. Kowalski and D. E. Thomas",
	title = "The {VLSI} design automation assistant: What's in a knowledge base",
	booktitle = "Design Automation Conference",
	year = "1985"
}

@TechReport{ ADD-TR-92,
	author = "V. Chaiyakul and D.D. Gajski and L. Ramachandran",
	title = "Minimizing Syntactic Variance with Assignment Decision Diagrams",
	institution = "UC Irvine",
	year = "1992",
	OPTkey = "",
	OPTtype = "",
	number = "ICS-TR-92-34",
	OPTaddress = "",
	OPTmonth = "",
	OPTnote = "",
	OPTannote = ""
}

@article{ Walker-Tcad89,
	author = "R. Walker and D. Thomas",
	title = "Behavioral transformation for algorithmic level {IC} design",
	journal = "{IEEE} Trans. on CAD",
	month = "Oct.",
	year = 1989
}

@InProceedings{ SysArchWork-Dac88,
	author = "D.E. Thomas and E.M. Dirkes and R.A. Walker and J.V. Rajan and J.A. Nestor and R.L. Blackburn",
	title = "The System Architect's Workbench",
	booktitle = "Design Automation Conference",
	year = "1988"
}

@InBook{ Chap:Yorktown,
	author = "R.K. Brayton and R. Camposano and G. De Micheli and R.H.J.M. Otten and J. van Eijndhoven",
	title = "The Yorktown Silicon Compiler System",
	year = "1988",
	publisher = "Addison-Wesley",
	chapter = " in Silicon Compilation"
}

@Article{ Sehwa88,
	author = "N. Park and A. Parker",
	title = "Sehwa: A software package for synthesis of pipelines from behavioral specifications",
	journal = "IEEE Transactions on Computer-Aided Design",
	month = "March",
	year = "1988"
}

@inproceedings{ graph_gajski,
	author = "Alex Orailoglu and Daniel D. Gajski",
	title = "Flow graph representation",
	booktitle = "DAC '86: Proceedings of the 23rd ACM/IEEE conference on Design automation",
	year = "1986",
	isbn = "0-8186-0702-5",
	pages = "503--509",
	location = "Las Vegas, Nevada, United States",
	publisher = "IEEE Press",
	address = "Piscataway, NJ, USA"
}

@TechReport{ Mcfarland-Value-TR78,
	author = "M. C. McFarland",
	title = "The Value Trace: A data base for automated digital design",
	institution = "Carnegie-Mellon University",
	year = "1978",
	OPTkey = "",
	OPTtype = "",
	number = "DRC-01-4-80",
	address = "Design Research Center",
	OPTmonth = "",
	OPTnote = "",
	OPTannote = ""
}

@inproceedings{ THR-Iccad89,
	author = "R. Hartley and A. E. Casavant",
	title = "Tree-Height Minimization in Pipelined Architectures",
	booktitle = "International Conference on Computer-Aided Design",
	year = "1989"
}

@inproceedings{ Nicolau-ITHR-Dac91,
	author = "A. Nicolau and R. Potasman",
	title = "Incremental Tree Height Reduction For High Level Synthesis",
	booktitle = "Design Automation Conference",
	year = "1991"
}

@book{ book:jerraya-behav-synth,
	author = "A.~A.~Jerraya and H.~Ding and P.~Kission and M.~Rahmouni",
	title = "Behavioral Synthesis and Component Reuse with {VHDL}",
	publisher = "Kluwer Academic Publishers",
	year = "1997"
}

@InProceedings{ Phideo91,
	author = "P. Lippens and J. Van Meerbergen and et al",
	title = "Phideo: A silicon compiler for high speed algorithms",
	booktitle = "European Conferance for Design Automation",
	year = "1991"
}

@InProceedings{ Cath3Dac91,
	author = "S.Note and W.Geurts and F.Catthoor and H.De Man",
	title = "Cathedral-III: Architecture driven high-level synthesis for high throughput {DSP} applications",
	booktitle = "dac",
	year = "1991"
}

@article{ Stok-HLSTut,
	author = "L. Stok",
	title = "Data {P}ath {S}ynthesis",
	journal = "Integration, the VLSI Journal",
	note = "Tutorial",
	month = "December",
	year = 1994,
	pages = "1-71"
}

@inproceedings{ Maha86,
	author = "A.C. Parker and J. Pizarro and M. Mlinar",
	title = "{MAHA}: A program for datapath synthesis",
	booktitle = "Design Automation Conference",
	year = 1986
}

@Misc{ Synopsys-BC,
	OPTkey = "",
	author = "Synopsys",
	title = "Behavioral Compiler",
	OPThowpublished = "",
	OPTmonth = "",
	OPTyear = "",
	note = "http://www.synopsys.com/products/beh\_syn/beh\_syn.html",
	OPTannote = ""
}

@InProceedings{ SumitSats98,
	author = "C.P. Ravikumar and S. Gupta and A. Jajoo",
	title = "Synthesis of Testable {RTL} Designs using Adaptive Simulated Annealing Algorithm",
	booktitle = "Eleventh International Conference on VLSI Design, India",
	year = "1998",
	OPTyear = ""
}

@article{ Potkonjak-Tcad94,
	author = "M. Potkonjak and J. Rabaey",
	title = "Optimizing resource utlization using tranformations",
	journal = "{IEEE} Trans. on CAD",
	month = "March",
	year = 1994
}

@InProceedings{ LoboCSRep91,
	author = "D.A. Lobo and B.M. Pangrle",
	title = "Redundant operator creation: A scheduling optimization technique",
	booktitle = "Design Automation Conference",
	year = "1991"
}

@InProceedings{ IqbalCSE93,
	author = "Z. Iqbal and M. Potkonjak and S. Dey and A. Parker",
	title = "Critical Path Optimization Using Retiming and Algebraic Speed-Up",
	booktitle = "Design Automation Conference",
	year = "1993"
}

@InProceedings{ PotMaximalFast92,
	author = "M. Potkonjak and J. Rabaey",
	title = "Maximally fast and arbitrarily fast implementation of linear computations",
	booktitle = "International Conference on CAD",
	year = "1992"
}

@Article{ PotMCM96,
	author = "M. Potkonjak and M.B. Srivastava and A. Chandrakasan",
	journal = "IEEE Trans. on CAD",
	title = "Multiple Constant Multiplications: Efficient and Versatile Framework and Algorithms for Exploring Common Subexpression Elimination",
	month = "Mar",
	year = "1996"
}

@Article{ ImecMCMCSE99,
	author = "R. Pasko and P. Schaumont and V. Derudder and S. Vernalde and D. Durackova",
	title = "A New Algorithm for Elimination of Common Subexpressions",
	journal = "IEEE Transactions on CAD",
	month = "Jan",
	year = "1999"
}

@InProceedings{ Oscar-92,
	author = "B. Landwehr and P. Marwedel and R. Doemer",
	title = "OSCAR: Optimum Simultaneous Scheduling, Allocation and Resource Binding Based on Integer Programming",
	booktitle = "European Design Automation Conference",
	year = "1994"
}

@Article{ OptILP-Wilson95,
	author = "T.C. Wilson and N. Mukherjee and M.K. Garg and D. K. Banerji",
	title = "An ILP Solution for Optimum Scheduling, Module and Register Allocation, and Operation Binding in Datapath Synthesis",
	journal = "VLSI Design",
	year = "1995"
}

@article{ HwangILP-Tcad91,
	author = "C.T. Hwang and T.H. Lee and Y. C. Hsu",
	title = "A formal approach to the scheduling problem in high level synthesis",
	journal = "IEEE Transactions on CAD",
	month = "April",
	year = "1991"
}

@article{ recentDevelHLS-97,
	author = "Y.-L. Lin",
	title = "Recent developments in high-level synthesis",
	journal = "ACM Transactions on Design Automation of Electronic Systems (TODAES)",
	volume = "2",
	number = "1",
	year = "1997"
}

%End of \section{Early Work in High Level Synthesis}

@Book{ book:Gajski-HLS,
	author = "D. D. Gajski and N. D. Dutt and A. C-H. Wu and S. Y-L. Lin",
	title = "High-Level Synthesis: Introduction to Chip and System Design",
	publisher = "Kluwer Academic",
	year = "1992",
	OPTedition = ""
}

@Book{ book:Gajski-Silicon,
	author = "D. D. Gajski",
	title = "Silicon Compilation",
	publisher = "Addison-Wesley",
	year = "1988"
}

@Article{ GajskiHLSTut,
	author = "D. D. Gajski and L. Ramachandran",
	title = "Introduction to {H}igh-level synthesis",
	journal = "IEEE Design and Test of Computers",
	year = "1994",
	OPTvolume = "",
	OPTnumber = "",
	OPTpages = "",
	month = "Winter"
}

@Book{ book:Camposano-HLS,
	editor = "R. Camposano and W. Wolf",
	title = "High Level VLSI Synthesis",
	publisher = "Kluwer Academic Publishers",
	year = "1991",
	OPTedition = ""
}

@Book{ book:Knapp-HLS,
	author = "D. W. Knapp",
	title = "Behavioral Synthesis: Digital System Design using the Synopsys Behavioral Compiler",
	publisher = "Prentice-Hall",
	year = "1996",
	OPTedition = ""
}

@Book{ book:Ku-Thesis,
	author = "D. C. Ku and G. De Micheli",
	title = "High Level Synthesis of {ASIC}s Under Timing and Synchronization Constraints",
	publisher = "Kluwer Academic",
	year = "1992",
	OPTedition = ""
}

@Article{ Olympus-DT90,
	author = "G. De Micheli and D. C. Ku and F. Mailhot and T. Truong",
	title = "The {O}lympus Synthesis System for Digital Design",
	journal = "IEEE Design and Test of Computers",
	year = "1990",
	OPTvolume = "",
	OPTnumber = "",
	pages = "37-53",
	month = "October"
}

@InProceedings{ PercBasedSynth90,
	author = "R. Potasman and J. Lis and A. Nicolau and D. Gajski",
	title = "Percolation Based Synthesis",
	booktitle = "Design Automation Conference",
	year = "1990"
}

@InProceedings{ ReorderingJess99,
	author = "L.C.V. dos Santos and J.A.G. Jess",
	title = "A Reordering Technique for Efficient Code Motion",
	booktitle = "Design Automation Conference",
	year = "1999"
}

@InProceedings{ CompCodeSantos97,
	author = "L.C.V. dos Santos",
	title = "A method to control compensation code during global scheduling",
	booktitle = "Workshop on Circuits, Systems and Signal Processing",
	year = "1997"
}

@inproceedings{ waka-dac-92,
	author = "K. Wakabayashi and H. Tanaka",
	title = "Global scheduling independent of control dependencies based on condition vectors",
	booktitle = "Design Automation Conference",
	year = 1992
}

@article{ Brewer-ControlSched96,
	author = "I. Radivojevic and F. Brewer",
	title = "A new symbolic technique for control-dependent scheduling",
	journal = "IEEE Transactions on CAD",
	month = "January",
	year = 1996
}

@PhdThesis{ Haynal-Thesis00,
	author = "S. Haynal",
	title = "Automata-Based Symbolic Scheduling",
	school = "University of California, Santa Barbara",
	year = "2000"
}

@article{ Kim-HRA-94,
	author = "T. Kim and N. Yonezawa and J.W.S. Liu and C.L. Liu",
	title = "A scheduling algorithm for conditional resource sharing - a hierarchical reduction approach",
	journal = "IEEE Transactions on CAD",
	month = "April",
	year = 1994
}

@article{ Rim-Jain-95,
	author = "M. Rim and Y. Fann and R. Jain",
	title = "Global Scheduling with Code-Motions for High-Level Synthesis Applications",
	journal = "IEEE Transactions on VLSI Systems",
	month = "September",
	year = 1995
}

@InProceedings{ Jha-SpecEx-98,
	author = "G. Lakshminarayana and A. Raghunathan and N.K. Jha",
	title = "Incorporating speculative execution into scheduling of control-flow intensive behavioral descriptions",
	booktitle = "Design Automation Conference",
	year = "1998"
}

@InProceedings{ Callahan-FPLA-98,
	author = "T. J. Callahan and J. Wawrzynek",
	title = "Instruction Level Parallelism for Reconfigurable Computing",
	booktitle = "Intl. Workshop on Field-Programmable Logic and Applications",
	year = 1998
}

@PhdThesis{ Santos-Thesis98,
	author = "L.C.V. dos Santos",
	title = "Exploiting instruction-level parallelism: a constructive approach",
	school = "Eindhoven University of Technology",
	year = "1998"
}

@inproceedings{ Pubss-Dac92,
	author = "W. Wolf and A. Takach and C.-Y. Huang and R. Manno and E. Wu",
	title = "The Princeton University behavioral synthesis system",
	booktitle = "Design automation conference",
	year = "1992"
}

@article{ HCDG-Kountouris-Todaes02,
	author = "A.A. Kountouris and C. Wolinski",
	title = "Efficient scheduling of conditional behaviors for high-level synthesis",
	journal = "ACM Transactions on Design Automation of Electronic Systems (TODAES)",
	month = "July",
	year = "2002"
}

@inproceedings{ HCDG-Kountouris-Isss00,
	author = "A.A. Kountouris and C. Wolinski",
	title = "Hierarchical conditional dependency graphs as a unifying design representation in the CODESIS high-level synthesis system",
	booktitle = "International Symposium on System Synthesis",
	year = "2000"
}

@inproceedings{ Ku-RelSched-Dac90,
	author = "D. Ku and G. De Micheli",
	title = "Relative scheduling under timing constraints",
	booktitle = "Design Automation Conference",
	year = "1990"
}

@InProceedings{ Spark-DCSE-Isss02,
	author = "S. Gupta and M. Reshadi and N. Savoiu and N.D. Dutt and R.K. Gupta and A. Nicolau",
	title = "Dynamic Common Sub-Expression Elimination during Scheduling in High-Level Synthesis",
	booktitle = "International Symposium on System Synthesis",
	year = "2002"
}

@InProceedings{ Spark-ILD-Dac02,
	author = "S. Gupta and T. Kam and M. Kishinevsky and S. Rotem and N. Savoiu and N.D. Dutt and R.K. Gupta and A. Nicolau",
	title = "Coordinated Transformations for High-Level Synthesis of High Performance Microprocessor Blocks",
	booktitle = "Design Automation Conference",
	year = "2002"
}

@InProceedings{ Spark-Spec-Dac01,
	author = "S. Gupta and N. Savoiu and S. Kim and N.D. Dutt and R.K. Gupta and A. Nicolau",
	title = "Speculation Techniques for High Level synthesis of Control Intensive Designs",
	booktitle = "Design Automation Conference",
	year = "2001"
}

@InProceedings{ Spark-CondSpec-Isss01,
	author = "S. Gupta and N. Savoiu and N.D. Dutt and R.K. Gupta and A. Nicolau",
	title = "Conditional Speculation and its Effects on Performance and Area for High-Level Synthesis",
	booktitle = "International Symposium on System Synthesis",
	year = "2001"
}

@InProceedings{ Spark-Sys-VLSI03,
	author = "S. Gupta and N.D. Dutt and R.K. Gupta and A. Nicolau",
	title = "{SPARK}: A High-Level Synthesis Framework For Applying Parallelizing Compiler Transformations",
	booktitle = "International Conference on VLSI Design",
	year = "2003"
}

@InProceedings{ Spark-BranchBal-DATE03,
	author = "S. Gupta and N.D. Dutt and R.K. Gupta and A. Nicolau",
	title = "Dynamic Conditional Branch Balancing during the High-Level Synthesis of Control-Intensive Designs",
	booktitle = "To appear in the Design, Automation and Test Conference",
	year = "2003"
}

@TechReport{ Spark-GlobalCMs-TR02-29,
	author = "S. Gupta and N. Savoiu and N.D. Dutt and R.K. Gupta and A. Nicolau",
	title = "Using Global Code Motions to Improve the Quality of Results for High-Level Synthesis",
	institution = "Center for Embedded Computer Systems, Univ. of California, Irvine",
	year = "2002",
	number = "CECS-TR-02-29"
}

@TechReport{ Spark-Spec-TR-00-40,
	author = "S. Gupta and N. Savoiu and S. Kim and N.D. Dutt and R.K. Gupta and A. Nicolau",
	title = "Speculation Techniques for High Level synthesis of Control Intensive Designs",
	institution = "UC Irvine",
	year = "2000",
	OPTkey = "",
	OPTtype = "",
	number = "ICS-TR-00-40",
	OPTaddress = "",
	OPTmonth = "",
	OPTannote = ""
}

@TechReport{ Spark-CondSpec-TR-01-25,
	author = "S. Gupta and N. Savoiu and N.D. Dutt and R.K. Gupta and A. Nicolau",
	title = "Conditional Speculation and its Effects on Performance and Area for High-Level Synthesis",
	institution = "UC Irvine",
	year = "2001",
	OPTkey = "",
	OPTtype = "",
	number = "ICS-TR-01-25",
	OPTaddress = "",
	OPTmonth = "",
	OPTannote = ""
}

@InProceedings{ Berga-BNG-DAC99,
	author = "R.A. Bergamaschi",
	title = "Behavioral network graph unifying the domains of high-level and logic synthesis",
	booktitle = "Design Automation Conference",
	year = "1999"
}

@InProceedings{ Waka-Cyber-Date99,
	author = "K. Wakabayashi",
	title = "C-based Synthesis Experiences with a Behavior Synthesizer, ``{C}yber''",
	booktitle = "Design, Automation and Test in Europe",
	year = "1999"
}

@article{ Jha-WaveSched-Tcad99,
	author = "G. Lakshminarayana and A. Raghunathan and N.K. Jha",
	title = "Wavesched: a novel scheduling technique for control-flow intensive designs",
	journal = "{IEEE} Transactions on CAD",
	month = "May",
	year = 1999
}

@InProceedings{ anshul-vliw-unit,
	author = "R. L. Gupta and A. Kumar and A. Van Der Werf and G. N. Busa",
	title = "Synthesizing a Long Latency Unit within {VLIW} Processor",
	booktitle = "Intl. Conf. on VLSI Design",
	year = 2000
}

@inproceedings{ Rim-Model-Dac92,
	author = "M. Rim and R. Jain",
	title = "Representing conditional branches for high-level synthesis applications",
	booktitle = "Design Automation Conference",
	year = "1992"
}

@inproceedings{ Paulin-CoDesign95,
	author = "P. Paulin and J. Frehel and M. Harrand and E. Berrebi and C. Liem and F Nacabal and J.-C. Herluison",
	title = "High-level synthesis and codesign methods: an application to a videophone codec",
	booktitle = "European design automation conference with EURO-VHDL",
	year = "1995"
}

@inproceedings{ Amical-Dac94,
	author = "P. Kission and H. Ding and A.A. Jerraya",
	title = "Structured Design Methodology for High-Level Design",
	booktitle = "Design Automation Conference",
	year = "1994"
}

%End of \section{High Level Synthesis}

@InProceedings{ FDS-Dac-87,
	author = "P. G. Paulin and J. P. Knight",
	title = "Force-Directed Scheduling in Automated Data Path Synthesis",
	booktitle = "Design Automation Conference",
	year = "1987"
}

@article{ FDS-Tcad-89,
	author = "P. G. Paulin and J. P. Knight",
	title = "Force-{D}irected {S}cheduling for the {B}ehavioral {S}ynthesis of {ASIC}'s",
	journal = "IEEE Transactions on CAD",
	month = "June",
	year = 1989,
	volume = 8,
	number = 6,
	pages = "661-678"
}

@Article{ PBS-Camp91,
	author = "R. Camposano",
	journal = "IEEE Transactions on Computer--Aided Design",
	title = "Path--Based Scheduling for Synthesis",
	month = "Jan.",
	year = "1991"
}

@InProceedings{ TBS-93,
	author = "S. Huang et al.",
	title = "A tree-based scheduling algorithm for control dominated circuits",
	booktitle = "Design Automation Conference",
	year = "1993"
}

@Article{ CfgDfg-Berga-TVLSI97,
	author = "R. A. Bergamaschi and S. Raje and L. Trevillyan",
	title = "Control-flow versus data-flow-based scheduling: combining both approaches in an adaptive scheduling system",
	journal = "IEEE Transactions on Very Large Scale Integration (VLSI) Systems",
	month = "March",
	year = "1997"
}

@inproceedings{ Mimola-dac86,
	author = "P. Marwedel",
	title = "A new synthesis for the MIMOLA software system",
	booktitle = "Design Automation Conference",
	year = "1986"
}

@Article{ Flamel-tcad87,
	author = "H. Trickey",
	title = "Flamel: A High-Level Hardware Compiler",
	journal = "IEEE Transactions on Computer--Aided Design",
	month = "March",
	year = "1987"
}

@inproceedings{ thomas-dac83,
	author = "C.Y. Hitchcock and D.E. Thomas",
	title = "A method of automatic data path synthesis",
	booktitle = "Design Automation Conference",
	year = "1983"
}

@Article{ cathedralII-dt86,
	author = "H. De Man et al.",
	title = "Cathedral-{II}: A silicon compiler for digital signal processing",
	journal = "IEEE Design \& Test Magazine",
	month = "December",
	year = "1986"
}

@inproceedings{ Slicer-Gajski-Iccad86,
	author = "B.M. Pangrle and D.D. Gajski",
	title = "Slicer: A state synthesizer for intelligent silicon compilation",
	booktitle = iccad,
	year = "1986"
}

@inproceedings{ Resched-Dac91,
	author = "I.-C. Park and C.-M. Kyung",
	title = "Fast and near optimal scheduling in Automatic Data path synthesis",
	booktitle = "Design Automation Conference",
	year = "1991"
}

@inproceedings{ Minvar-Gajski-Dac93,
	author = "V. Chaiyakul and D.D. Gajski and L. Ramachandran",
	title = "High level transformations for minimizing syntactic variances",
	booktitle = "Design Automation Conference",
	year = "1993"
}

@inproceedings{ Anneal-Simult90,
	author = "A. Safir and B. Zavidovique",
	title = "Towards a Global Solution to High level Synthesis Problems",
	booktitle = "European Design Automation Conference",
	year = "1990"
}

@Article{ Anneal-Simult-Hash97,
	author = "P. Kollig and B. M. Al-Hashimi",
	title = "Simultaneous scheduling, allocation and binding in high level synthesis",
	journal = "Electronics Letters",
	month = "August",
	year = "1997"
}

%End of \section{Scheduling in High Level Synthesis}

@inproceedings{ Jian-HDLOpt-DAC96,
	author = "J. Li and R.K. Gupta",
	title = "{HDL} Optimizations using {T}imed {D}ecision {T}ables",
	booktitle = "Design Automation Conference",
	year = "1996"
}

@inproceedings{ Jian-TDTDecomp-Iccad97,
	author = "J. Li and R.K. Gupta",
	title = "Decomposition of {T}imed {D}ecision {T}ables and its Use in Presynthesis Optimizations",
	booktitle = "International Conference on Computer Aided Design",
	year = "1997"
}

@inproceedings{ Kount-PreSyn-EuroMicro99,
	author = "A. Kountouris and C. Wolinski",
	title = "High Level Pre-Synthesis Optimization Steps using Hierarchical Conditional Dependency Graphs",
	booktitle = "Euromicro Confernce",
	year = "1999"
}

@inproceedings{ Penalba-CondReuse-02,
	author = "O. Pe�lba and J.M. Mend�s and R. Hermida",
	title = "Maximizing Conditional Reuse by Pre-Synthesis Transformations",
	booktitle = "Design, Automation and Test in Europe",
	year = "2002"
}

%\End of section{Pre-Synthesis Transformations}

@inproceedings{ waka-iccad-89,
	author = "K. Wakabayashi and T. Yoshimura",
	title = "A resource sharing and control synthesis method for conditional branches",
	booktitle = iccad,
	year = 1989
}

@InProceedings{ Bridge-88,
	author = "C.-J. Tseng and R.-S. Wei and S. G. Rothweiler and M. M. Tong and A. K. Bose",
	title = "Bridge: A Versatile Behavioral Synthesis System",
	booktitle = "Design Automation Conference",
	year = "1988"
}

@InProceedings{ Parker-CSG-ADAM92,
	author = "J.-P. Weng and A. C. Parker",
	title = "{CSG}: Control Path Synthesis in the {ADAM} System",
	booktitle = "International Workshop on High Level Synthesis",
	year = "1992"
}

@InProceedings{ Park-time-stationary-controllers91,
	author = "J.J. Kim and F.J. Kurdahi and N. Park",
	title = "Automatic synthesis of time-stationary controllers for pipelined data paths",
	booktitle = iccad,
	year = "1991"
}

@InProceedings{ Kifli-Unified-Scheduling95,
	author = "A. Kifli and G. Goossens and H. De Man",
	title = "A Unified Scheduling Model for High-Level Synthesis and Code Generation",
	booktitle = edtc,
	year = "1995"
}

@InProceedings{ ReProgrammable-Rahmoune98,
	author = "M. Benmohammed and A. Rahmoune",
	title = "Automatic generation of reprogrammable microcoded controllers within a high-level synthesis environment",
	booktitle = "IEE Proceedings-Computers and Digital Techniques",
	year = "1998"
}

@InProceedings{ Cathedral-II-CGE90,
	author = "J. Zegers and P. Six and J. Rabaey and H. De Man",
	title = "{CGE}: Automatic Generation of Controllers in the {CATHEDRAL-II} Silcion Compiler",
	booktitle = dac,
	year = "1990"
}

@Article{ EdLee-DspArchs-88,
	author = "E.A. Lee",
	title = "Programmable {DSP} architectures, {P}arts {I}, {II}",
	journal = "IEEE ASSP Magazine",
	year = 1988,
	month = "October"
}

@InProceedings{ Lee-Process-Oriented-Async2000,
	author = "E. Eim and J.-G. Lee and D.-I. Lee",
	title = "Automatic process-oriented control circuit generation for asynchronous high-level synthesis",
	booktitle = "International Symposium on Advanced Research in Asynchronous Circuits and Systems",
	year = "2000"
}

@InProceedings{ Kurdahi-Control-Data94,
	author = "D.S. Rao and F.J. Kurdahi",
	title = "Controller and datapath trade-offs in hierarchical {RT}-level synthesis",
	booktitle = "International Symposium on High-Level Synthesis",
	year = "1994"
}

@InProceedings{ Wolf-Controller-delay94,
	author = "S.C.-Y. Huang and W.H. Wolf",
	title = "How datapath allocation affects controller delay",
	booktitle = "International Symposium on High-Level Synthesis",
	year = "1994"
}

@InProceedings{ Vemuri-Sync-Controller96,
	author = "N.N.J. Roy and R. Vemuri",
	title = "Synchronous Controller Models for Synthesis from Communicating {VHDL} Processes",
	booktitle = "International Conference on VLSI Design",
	year = "1996"
}

@Article{ Practical-FSM-VHDL95,
	author = "S. Rajan",
	title = "Practical State Machine Design Using {VHDL}",
	journal = "Integrated System Design Magazine",
	year = "1995",
	month = "Febuary",
	note = "http://www.isdmag.com/editorial/1995/fpgafeature9502.html"
}

@InProceedings{ Paulin-Horiz-Partition-PLA-89,
	author = "P.G. Paulin",
	title = "Horizontal Partitioning of {PLA}-based Finite State Machines",
	booktitle = dac,
	year = "1989"
}

%End of \section{Control Synthesis in High Level Synthesis}

@InProceedings{ PaulinDac89,
	author = "P. G. Paulin and J. P. Knight",
	title = "Scheduling and {B}inding {A}lgorithms for {H}igh-{L}evel {S}ynthesis",
	booktitle = dac,
	year = "1989"
}

@Article{ Binding-Tseng-86,
	author = "C.J. Tseng and D.P. Siewiorek",
	title = "Automated synthesis of data paths in digital systems",
	journal = tcad,
	year = "1986",
	month = "July"
}

@Article{ ILPSynth-Gebotys-86,
	author = "C.H. Gebotys and M.I. Elmasry",
	title = "Optimal synthesis of high-performance architectures",
	journal = "IEEE Journal of Solid-State Circuits",
	year = "1992",
	month = "March"
}

@InProceedings{ Stok-ModAlloc-91,
	author = "L. Stok and W.J.M. Philipsen",
	title = "Module allocation and comparability graphs",
	booktitle = "{IEEE} International Sympoisum on Circuits and Systems",
	year = "1991"
}

@InProceedings{ Stok-RegAllocMultiCommFlow-92,
	author = "L. Stok",
	title = "Transfer free register allocation in cyclic data flow graphs",
	booktitle = "European Conf. on Design Automation",
	year = "1992"
}

@Article{ Binding-Saluj-96,
	author = "A. Mujumdar and R. Jain and K. Saluja",
	title = "Incorporating performance and testability constraints during binding in high-level synthesis",
	journal = "IEEE Trans. on CAD",
	year = "1996",
	optmonth = "October"
}

@InProceedings{ Pedram-ModAssign-96,
	author = "J.-M. Chang and M. Pedram",
	title = "Module assignment for low power",
	booktitle = "European Design Automation Conference",
	year = "1996"
}

@InProceedings{ Pedram-RegAlloc-96,
	author = "J.-M. Chang and M. Pedram",
	title = "Register allocation and binding low power",
	booktitle = "Design Automation Conf.",
	year = "1995"
}

%End of \section{Binding in High Level Synthesis}

@Article{ ModSel-McFar90,
	author = "M.C. McFarland and A.C. Parker and R. Camposano",
	title = "The high-level synthesis of digital systems",
	journal = "Proceedings of the IEEE",
	year = "1990",
	month = "February"
}

@InProceedings{ ModSel-DonThom-Dac81,
	author = "G.W. Leive and D.E. Thomas",
	title = "A technology relative logic synthesis and module selection system",
	booktitle = "Design Automation Conference",
	year = "1981"
}

@Article{ ModSel-Potk-DT91,
	author = "J. M. Rabaey and C. Chu and P. Hoang and M. Potkonjak",
	title = "Fast Prototyping of Datapath-Intensive Architectures",
	journal = "IEEE Design \& Test of Computers",
	year = "1991",
	month = "June"
}

@InProceedings{ ModSel-DeMi-Iscas91,
	author = "M. Ishikawa and G. D. Micheli",
	title = "A Module Selection Algorithm for High-Level Synthesis",
	booktitle = "International Symposium on Circuits and Systems",
	year = "1991"
}

@InProceedings{ BitPartUnits-Date03,
	author = "M. Molina and J. Mend'as, and R. Hermida",
	title = "High-Level Allocation to Minimize Internal Hardware Wastage",
	booktitle = "Design, Automation and Test in Europe",
	year = "2003"
}

%End of \section{Module Selection in High Level Synthesis}

@inproceedings{ Rotation-Chao-Dac93,
	author = "L.-F. Chao and A. S. LaPaugh and E. H.-M. Sha",
	title = "Rotation Scheduling: A Loop Pipelining Algorithm",
	booktitle = "Design Automation Conference",
	year = "1993"
}

@inproceedings{ Winding-Girczyc-Iscs87,
	author = "E. Girczyc",
	title = "Loop Winding - A data flow approach to functional pipelining",
	booktitle = "International Symposium of Circuits and Systems",
	year = "1987"
}

@inproceedings{ Ernst-loopPipe95,
	author = "U. Holtmann and R. Ernst",
	title = "Combining {MBP}-Speculative Computation and Loop Pipelining in High-Level Synthesis",
	booktitle = "European Design and Test Conference",
	year = "1995"
}

@inproceedings{ loopFolding-CatII-89,
	author = "G. Goossens and J. Vandewlle and H. De Man",
	title = "Loop optimization in register-transfer scheduling for DSP-systems",
	booktitle = "Design automation conference",
	year = "1989"
}

@inproceedings{ LoopDirSched-Dac94,
	author = "S. Bhattacharya and S. Dey and F. Brglez",
	title = "Performance Analysis and Optimization of Schedules for Conditional and Loop-Intensive Specifications",
	booktitle = "Design automation conference",
	year = "1994"
}

@inproceedings{ Brewer-LoopFold-95,
	author = "I. Radivojevic and F. Brewer",
	title = "Analysis of Conditional Resource Sharing Using a Guard-based Control Representation",
	booktitle = "International Conference on Computer Design",
	year = 1995
}

@inproceedings{ BrAntic-97,
	author = "T. Z. Yu and E. H.-M. Sha and N. Passos and R. D.-C. Ju",
	title = "Algorithms and Hardware Support for Branch Anticipation,",
	booktitle = "Great Lakes Symposium on VLSI",
	year = 1997
}

%End of \section{Loop Transformations in High Level Synthesis}

@InProceedings{ Rappid-Shai,
	author = "S. Rotem and K. Stevens and R. Ginosar and P. Beerel and C. Myers and K. Yun et al",
	title = "RAPPID: An Asynchronous Instruction Length Decoder",
	booktitle = "Intl. Symp. on Advanced Research in Asynchronous Circuits and Systems",
	year = "1999"
}

%End of \section{Asynchronous Design}

@inproceedings{ Avra,
	title = "Allocation and {A}ssignment in {H}igh-{L}evel {S}ynthesis for {S}elf-{T}estable {D}ata {P}aths",
	author = "L. Avra",
	booktitle = "Proceedings of International Test Conference",
	pages = "463-472",
	year = 1991
}

@article{ Breuer,
	author = "S.-P. Lin and C. Njinda and M. Breuer",
	title = "Generating a {F}amily of {T}estable {D}esigns using the {BILBO} {M}ethodology",
	journal = "Journal of Electronic Testing: Theory and Applications",
	year = 1993,
	pages = "71-89"
}

@article{ Chandra,
	author = "R. Chandrasekharam and V. Vinod and S. Subramaniam",
	title = "Genetic {A}lgorithms for {T}est {S}cheduling",
	journal = "Integration, the VLSI Journal",
	month = "October",
	year = 1994,
	volume = 17,
	number = 2,
	pages = "153-162"
}

@inproceedings{ Papa,
	author = "C. Papachristou and S. Chiu and H. Harmanani",
	title = "A {F}ramework for {H}igh-{L}evel {S}ynthesis with {S}elf- {T}estability",
	booktitle = "Proceedings of the {I}nternational {C}onference on {C}omputer-{A}ided {D}esign",
	year = 1991
}

@Book{ BreuerTestBook,
	author = "M. Abramovici and M. A. Breuer and A. D. Friedman",
	title = "Digital Systems Testing and Testable Design",
	publisher = "Computer Science Press",
	year = "1990",
	OPTedition = ""
}

@Inproceedings{ Konemann,
	author = "B. Konemann and J. Moucha and G. Zwiehoff",
	title = "Built-in Logic Block Observation Technique",
	booktitle = "Proceedings of IEEE Test Conference",
	year = 1979,
	pages = "37--41"
}

%End of \section{Testability Oriented Synthesis}

@Article{ IBMAsic,
	author = "J. J. Engel and et al",
	title = "Design methodology for {IBM} {ASIC} products",
	journal = "IBM Journal of Research and Development",
	year = "1996",
	volume = "40",
	number = "4",
	OPTpages = "",
	month = "July"
}

@InProceedings{ Rajesh-Regularity-Extract-98,
	author = "A. Chowdhary and S. Kale and P. Saripella and N. K. Sehgal and R. K. Gupta",
	title = "A General Approach for Regularity Extraction in Datapath Circuits",
	booktitle = "International Conference on Computer-Aided Design",
	year = "1998"
}

@InProceedings{ Janssen-SpecInv-94,
	author = "M.Janssen and F.Catthoor and H.De Man",
	title = "A specification invariant technique for operation cost minimisation in flow-graphs",
	booktitle = "Intl. Symp. on High-level Synthesis",
	year = "1994"
}

@Article{ GuptaCoreTut,
	author = "Y. Zorian and R. K. Gupta",
	title = "Introduction to Core-Based Design",
	journal = "IEEE Design and Test of Computers",
	year = "1997",
	OPTvolume = "",
	OPTnumber = "",
	OPTpages = "",
	month = "October"
}

@InBook{ Chapter:Sumit-ASIC,
	author = "S. Gupta and R. K. Gupta",
	OPTeditor = "Wai-Kai Chen",
	title = "The {VLSI} Handbook",
	chapter = "{ASIC} Design",
	publisher = "CRC Press and IEEE Press",
	year = "2000",
	OPTpages = "",
	note = "Chapter 64"
}

%End of \section{General Design Methodology References}

@InProceedings{ Soonhoi98,
	author = "W. Sung and J. Kim and S. Ha",
	title = "Memory Efficient Software Synthesis from Dataflow Graphs",
	booktitle = "International Symposium on System Synthesis",
	year = "1996",
	month = "March"
}

@Article{ SoftSynthMurthy97,
	author = "P. Murthy and S. Bhattacharyya and E.Lee",
	title = "{APGAN} and {RPMC}: {C}omplementary Heuristics for Translating {DSP} Block Diagrams into Efficient Software Implementations",
	journal = "Design Automation of Embedded Systems",
	year = "1997",
	OPTvolume = "",
	OPTnumber = "",
	OPTpages = "",
	OPTmonth = ""
}

@InProceedings{ SwSynthGupta96,
	author = "R. Gupta",
	title = "Operation Serializability and Software Generation for Embedded Systems",
	booktitle = "European Design and Test Conferece",
	year = "1996",
	month = "March"
}

@InProceedings{ SynthSFBDPowell92,
	author = "D. Powell and E. Lee and W. Newman",
	title = "Direct Synthesis of Optimized {DSP} Assembly Code from Signal Flow Block Diagrams",
	booktitle = "International Conference on Acoustics, Speech and Signal Proc",
	year = "1990",
	month = "March"
}

@InProceedings{ SwSynthRitz90,
	author = "S.Ritz, S.Pankert, H.Meyr",
	title = "High Level Software Synthesis for Signal Proc. Systems",
	booktitle = "International Conference on Acoustics, Speech and Signal Proc",
	year = "1990",
	OPTmonth = ""
}

@InProceedings{ ChiodoSwSynth95,
	author = "M. Chiodo and et al",
	title = "Synthesis of software programs for embedded control applications",
	booktitle = dac,
	year = "1995"
}

@article{ Gupta-program-implement,
	author = "R.K. ~Gupta and C. Coelho and G. De Micheli",
	title = "Program Implementation Schemes for Hardware-Software Systems",
	journal = "IEEE Computer",
	month = "January",
	year = "1994"
}

@inproceedings{ Chou-sw-sched-dac,
	author = "P. ~Chou and G. ~Borriello",
	title = "Software scheduling in the Co-Synthesis of Reactive Real-Time Systems",
	booktitle = dac,
	year = 1994,
	editor = "",
	publisher = "",
	address = "",
	month = ""
}

@InProceedings{ goosens-dsp-compiler,
	author = "G. Goosens and K. Rabaey and J. Vanderwalle and H. De Man",
	title = "An Efficient Microcode compiler for Custom {DSP}-Processors",
	booktitle = iccad,
	year = "1987"
}

%End of \section{Software Synthesis}

@inproceedings{ paper:ssyn-comm-uw,
	author = "E. ~Walkup and G. ~Borriello",
	title = "Automatic synthesis of device drivers for hardware-software codesign",
	booktitle = codes,
	month = "October",
	year = "1993"
}

@article{ paper:ssyn-comm-coware,
	author = "D. ~Verkest and K. Van ~Rompaey and I. ~Bolshens and H. De ~Man",
	title = "{CoWare}: a design environment for heterogeneous hardware/software systems",
	journal = "Design Automation for Embedded Systems",
	volume = "1",
	month = "October",
	year = "1996"
}

%End of \section{Communication and Interface Synthesis}

@inproceedings{ paper:cosim-rowson,
	author = "J. ~Rowson",
	title = "Hardware/software co-simulation",
	booktitle = dac31,
	month = "June",
	year = "1994"
}

@inproceedings{ paper:cosim-wilson,
	author = "J. ~Wilson",
	title = "Hardware/software selected cycle solution",
	booktitle = "Proc. of the Int. Workshop on Hardware-Software Codesign",
	month = "October",
	year = "1994"
}

@inproceedings{ paper:cosim-rabaey,
	author = "S. ~Lee and J.M. ~Rabaey",
	title = "A Hardware/software co-simulation environment",
	booktitle = "Proc. of the Int. Workshop on Hardware-Software Codesign",
	month = "October",
	year = "1993"
}

@inproceedings{ paper:cosim-meyr,
	author = "K. ten Hagen and H. ~Meyr",
	title = "Timed and untimed hardware/software cosimulation: application and efficient implementation",
	booktitle = "Proc. of the Int. Workshop on Hardware-Software Codesign",
	month = "October",
	year = "1993"
}

@article{ paper:cosim-ptolemy,
	author = "J. ~Buck and S. ~Ha and E.A. ~Lee and D.G. ~Messerschmitt",
	title = "Ptolemy: a framework for simulating and prototyping heterogeneous systems",
	journal = "International Journal of Computer Simulation",
	volume = "special issue on Simulation Software Development",
	number = "3",
	month = "January",
	year = "1990"
}

@inproceedings{ paper:cosim-sutarwala,
	author = "S. ~Sutarwala and P. ~Paulin",
	title = "Flexible modeling environment for embedded systems design",
	booktitle = codes,
	year = "1994"
}

@inproceedings{ paper:cosim-rosenstiel,
	author = "G. ~Kuch and U. ~Kebschull and W. ~Rosenstiel",
	title = "A prototyping architecture for hardware/software codesign in the {COBRA} project",
	booktitle = codes,
	year = "1994"
}

%End of \section{Hardware-Software Co-Simulation}

@article{ paper:edwards,
	author = "S.~Edwards and L.~Lavagno and E.A.~Lee and A.~Sangiovanni-Vincentelli",
	title = "Design of Embedded Systems: Formal Models, Validation, and Synthesis",
	journal = "Proc. of the IEEE",
	volume = "85",
	number = "3",
	month = "year",
	year = "1997"
}

%End of \section{Formal Methods and Verification}

@Book{ KatzBook,
	author = "R. H. Katz",
	title = "Contemporary Logic Design",
	publisher = "Benjamin/Cummings Publishing",
	year = "1994"
}

@Book{ KeutzerBook94,
	author = "S. Devadas and A. Ghosh an K. Keutzer",
	title = "Logic Synthesis",
	publisher = "McGraw-Hill",
	year = "1994"
}

@Book{ HachtelBook,
	author = "G. D. Hachtel and F. Somenzi",
	title = "Logic Synthesis and Verification Algorithms",
	publisher = "Kluwer Academic",
	year = "1996"
}

@Book{ McCluskeyBook,
	author = "E. J. McCluskey",
	title = "Logic Design Principles",
	publisher = "Prentice Hall",
	year = "1996",
	OPTedition = ""
}

@Misc{ Synopsys-DC,
	OPTkey = "",
	author = "Synopsys Incorporated",
	title = "Design Compiler",
	OPThowpublished = "",
	OPTmonth = "",
	OPTyear = "",
	OPTnote = "http://www.synopsys.com/products/logic/logic.html",
	OPTannote = ""
}

@InProceedings{ BergaDontCares,
	author = "R.A. Bergamaschi and D. Brand and L. Stok",
	title = "Efficient Use of Large Don't Cares in High-Level and Logic Synthesis",
	booktitle = iccad,
	year = "1995"
}

% End of \section{Logic Synthesis}

@Article{ Najm94,
	author = "F. N. Najm",
	title = "A Survey of Power Estimation Techniques in VLSI Circuits",
	journal = "IEEE Transactions on Very Large Scale Integration (VLSI) Systems",
	year = "1994",
	OPTvolume = "",
	OPTnumber = "",
	OPTpages = "",
	month = "December"
}

@Article{ Pedram96,
	author = "M. Pedram",
	title = "Power Minimization in IC Design: Principles and Applications",
	journal = "ACM Transactions on Design Automation of Electronic Systems",
	year = "1996",
	OPTvolume = "",
	OPTnumber = "",
	OPTpages = "",
	month = "January"
}

@Book{ book:LucMicheliPower,
	author = "L. Benini and G. De Micheli",
	title = "Dynamic Power Management: Design Techniques and CAD Tools",
	publisher = "Kluwer Academic",
	year = "1997",
	OPTedition = ""
}

@article{ paper:estimate-power-princeton,
	author = "V. ~Tiwari and S. ~Malik and A. ~Wolfe",
	title = "Power analysis of embedded software: a first step towards software power minimization",
	journal = tvlsi,
	volume = "2",
	number = "4",
	pages = "437-445",
	month = "December",
	year = "1994"
}

%End of \section{Power Minimization and Management}

@Book{ WolfBook,
	author = "W. Wolf",
	title = "Modern VLSI Design: Systems on Silicon",
	publisher = "Prentice Hall",
	year = "1998",
	OPTedition = ""
}

@Book{ WesteVlsiBook,
	author = "N. Weste and K. Eshraghian",
	title = "Principles of CMOS VLSI Design: A Systems Perspective",
	publisher = "Addison Wesley",
	year = "1994",
	OPTedition = ""
}

@InProceedings{ KeutzerTechMap87,
	author = "K. Keutzer",
	title = "DAGON: Technology Binding and Local Optimization by DAG Matching",
	booktitle = dac,
	year = "1987"
}

@Book{ BraytonEspressoBook94,
	author = "R. K. Brayton and C. McMullen and G. D. Hachtel and A. Sangiovanni-Vincentelli",
	title = "Logic Minimization Algorithms for {VLSI} Synthesis",
	publisher = "Kluwer Academic",
	year = "1984",
	OPTedition = ""
}

@Article{ BraytonMIS87,
	author = "R. K. Brayton and R. Rudell and A. Sangiovanni-Vincentelli and A. Wang",
	title = "{MIS}: A Multiple-Level Logic Optimization System",
	journal = "IEEE Transactions on CAD/ICAS, CAD-6",
	year = "1987",
	OPTvolume = "",
	OPTnumber = "",
	OPTpages = "",
	month = "November"
}

@Misc{ Quickturn,
	OPTkey = "",
	author = "Quickturn",
	title = "Emulation Tools",
	OPThowpublished = "",
	OPTmonth = "",
	OPTyear = "",
	note = "http://www.quickturn.com",
	OPTannote = ""
}

@inproceedings{ TimberWolf,
	title = "TimberWolf 3.2 : A new standard cell placement and global routing package",
	author = "C. Sechen and A. Sangiovanni-Vincentelli",
	year = 1986,
	booktitle = "Proceedings of IEEE/ACM Design Automation Conference",
	pages = "432--439"
}

%End of \section{VLSI Design and Layout}

@InProceedings{ Sumit-Imec-Date00,
	author = "S. Gupta and M. Miranda and F. Catthoor and R. Gupta",
	title = "Analysis of High-level Address Code Transformations for Programmable Processors",
	booktitle = "Design, Automation and Test in Europe",
	year = "2000",
	OPTmonth = ""
}

@InProceedings{ Kitagaki91,
	author = "K.Kitagaki and T.Oto and T.Demura and Y.Araki and T.Takada",
	title = "A new address generation unit architecture for video signal processing",
	booktitle = "Visual Communications and Image Processing",
	year = "1991"
}

@InProceedings{ Miranda-Adopt-96,
	author = "M.Miranda and F.Catthoor and M.Janssen and H.De Man",
	title = "ADOPT: Efficient hardware address generation in distributed memory architectures",
	booktitle = "isss",
	year = "1996"
}

@InProceedings{ Leupers96,
	author = "R.Leupers and P.Marwedel",
	title = "Algorithms for Address Assignment in {DSP} Code Generation",
	booktitle = iccad,
	year = "1996"
}

@InProceedings{ Devadas97,
	author = "A.Sudarsanam and S.Liao and S.Devadas",
	title = "Analysis and evaluation of address arithmetic capabilities in custom {DSP} architectures",
	booktitle = dac,
	year = "1997"
}

@Article{ Wess99,
	author = "B.Wess",
	title = "Minimisation of data address computation overhead in {DSP} programs",
	journal = "Design Automation for Embedded Systems",
	year = "1999"
}

@Article{ Adopt-TVLSI-98,
	author = "M.Miranda and F.Catthoor and M. Janssen and H.De Man",
	title = "High-Level Address Optimisation and Synthesis Techniques for Data-Transfer Intensive Applications",
	journal = "IEEE Transactions on VLSI Systems",
	month = "December",
	year = "1998",
	OPTnumber = "4",
	OPTvolume = "6"
}

@InProceedings{ Liem96,
	author = "C.Liem and P.Paulin and A.Jerraya",
	title = "Address Calculation for Retargetable Compilation and Exploration of Instruction-Set Architectures",
	booktitle = "Design Automation Conferece",
	year = "1996",
	OPTmonth = ""
}

%End of \section{Address Generation and Address Unit Synthesis}

@InProceedings{ Corinna95,
	author = "S.M. Pujare and C.G. Lee and P. Chow",
	title = "Machine-Independent Compiler Optimizations for the UofT {DSP} Architecture",
	booktitle = "International Conference on Signal Processing Applications and Technology",
	year = "1995"
}

@Book{ book:Aho,
	author = "A. Aho and R. Sethi and J. Ullman",
	title = "Compilers: Principles and Techniques and Tools",
	publisher = "Addison-Wesley",
	year = "1986"
}

@Book{ book:Muchnick,
	author = "S. S. Muchnick",
	title = "Advanced Compiler Design and Implementation",
	publisher = "Morgan Kaufmann",
	year = "1997"
}

@Article{ Wolfe95,
	author = "M.Gerleck and E.Stoltz and M.Wolfe",
	title = "Beyond induction variables: detecting and classifying sequences using a demand-driven SSA form",
	journal = "ACM Trans. Progrm. Languages and Systems",
	year = "1995",
	month = "January"
}

@Article{ incrDomTree97,
	author = "V.C. Sreedhar and G. R. Gao and Y.-F. Lee",
	title = "Incremental computation of dominator trees",
	journal = "ACM Trans. Progrm. Languages and Systems",
	year = "1997",
	month = "March"
}

@Article{ groupDomTree96,
	author = "V.C. Sreedhar and G. R. Gao and Y.-F. Lee",
	title = "A new framework for exhaustive and incremental data flow analysis using {DJ} graphs",
	journal = "ACM SIGPLAN Conf. on PLDI",
	year = "1996"
}

@Article{ preSSA99,
	author = "R. Kennedy and S. Chan and S.-M. Liu and R. Io and P. Tu and F. Chow",
	title = "Partial redundancy elimination in {SSA} form",
	journal = "ACM Trans. Progrm. Languages and Systems",
	year = "1999",
	month = "May"
}

@article{ bacon94compiler,
	author = "David F. Bacon and Susan L. Graham and Oliver J. Sharp",
	title = "Compiler Transformations for High-Performance Computing",
	journal = "ACM Computing Surveys",
	volume = "26",
	number = "4",
	pages = "345--420",
	year = "1994"
}

@Manual{ TIC6x,
	title = "TI TMS320C6x User's Guide",
	organization = "Texas Instruments"
}

@Manual{ TM10x,
	title = "Trimedia TM1000 Programmable media processor databook",
	organization = "Philips Semiconductor"
}

%End of \section{Compilation for DSPs and other Embedded Processors}

@Book{ book:Atomium,
	author = "F. Catthoor and S. Wuytack and E. De Greef and F. Balasa and L. Nachtergaele and A. Vandecappelle",
	title = "Custom Memory Management Methodology: Exploration of Memory Organisation for Embedded Multimedia System Design",
	publisher = "Kluwer Academic Publishers",
	year = "1998"
}

@InProceedings{ Acropolis96,
	author = "K. Danckaert and F. Catthoor and H. De Man",
	title = "System-level memory management for weakly parallel image processing",
	booktitle = "EuroPar Conference",
	year = "1996"
}

@PhdThesis{ Panda-Thesis98,
	author = "P.R. Panda",
	title = "Memory Optimizations and Exploration for Embedded Systems",
	school = "University of California, Irvine",
	year = "1998"
}

@PhdThesis{ Luc-Thesis01,
	author = "L. S��ia",
	title = "Applying Pointer Analysis to the Synthesis of Hardware from C",
	school = "Stanford University",
	year = "2001"
}

%End of \section{Memory Management and Synthesis}

@Book{ CLR90,
	author = "T. T. Cormen , C. E. Leiserson , R. L. Rivest",
	title = "Introduction to algorithms",
	publisher = "MIT Press, Cambridge, MA",
	year = "1990"
}

@Book{ book:Switch-Theo-81,
	author = "F.J. Hill and G.R. Peterson",
	title = "Switching Theory and Logical Design",
	publisher = "Wiley, New York",
	year = "1981"
}

@article{ SimulatedAnnealing,
	author = "S. Kirkpatrick and C. D. Gelatt Jr. and M. P. Vecchi",
	title = "Optimization by {S}imulated {A}nnealing",
	journal = "Science",
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	year = 1983,
	volume = 220,
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	pages = "671-680"
}

@inproceedings{ leftedgealgo,
	author = "A. Hashimoto and J. Stevens",
	title = "Wire {R}outing by {O}ptimizing {C}hannel {A}ssignment within large {A}pertures",
	booktitle = "Proceedings of 8th Design Automation Workshop",
	year = 1971,
	pages = "155-169"
}

@article{ listscheduling,
	author = "S. Davidson and others",
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	year = 1981,
	pages = "460-477"
}

@article{ routing,
	author = "T. Yoshimura and E. S. Kuh",
	title = "Efficient {A}lgorithms for {C}hannel {R}outing",
	journal = "IEEE Transactions on CAD",
	volume = 1,
	year = 1982
}

@book{ learningAutomata,
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	year = 1989
}

@Article{ TravellingSalesmanProb,
	author = "S. Lin and B. Kernighan",
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	year = 1965,
	month = "December"
}

@book{ book:klein-real-time-analysis-ratetm,
	author = "M.~H. Klein and T. Ralya and B. Pollak and R. Obenza",
	title = "A Practitioner's Handbook for Real-Time Analysis : Guide to Rate Monotonic Analysis for Real-Time Systems",
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	year = "1993",
	volume = "",
	series = "",
	address = "Boston, MA, USA",
	edition = "",
	month = ""
}

%End of \section{Algorithms for CAD}

@inproceedings{ UnifExp85,
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	booktitle = "International Conf. on Parallel Processing",
	year = 1985
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@inproceedings{ GripPercolation92,
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@Article{ Percolation88,
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@TechReport{ PercolationTR,
	author = "A. Nicolau",
	title = "A Development Environment for Scientific Parallel Programs",
	institution = "Department of Computer Science, Cornell University",
	year = "1985",
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	OPTtype = "",
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	year = 1993
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@Article{ Trailblazing95,
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@inproceedings{ PerfectPipe88,
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	title = "Perfect {P}ipelining: {A} new loop parallelization technique",
	booktitle = "European Symposium on Programming",
	year = 1988
}

@inproceedings{ RDLP96,
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@Article{ RCSP-Pads95,
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@inproceedings{ DynRenamingEbcioglu92,
	author = "S.-M. Moon and K. Ebcioglu",
	title = "An efficient resource-constrained global scheduling technique for superscalar and {VLIW} processors",
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	year = 1992
}

@inproceedings{ SoftPipe-Micro90,
	author = "R. Jones and V. Allan",
	title = "Software Pipelining: {A} comparison and Improvement",
	booktitle = "Proceedings of the Micro-23",
	year = 1990
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@inproceedings{ Modulo-Sched-81,
	author = "B. R. Rau and C. D. Glaeser",
	title = "Some scheduling techniques and an easily schedulable horizontal architecture for high performance scientific computing",
	booktitle = "Annual Workshop on Microprogramming",
	year = "1981"
}

@Article{ HTGs-92,
	author = "M. Girkar and C.D. Polychronopoulos",
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	year = 1992,
	month = "Mar."
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@Article{ TraceSched81,
	author = "J. Fisher",
	title = "Trace scheduling: A technique for global microcode compaction",
	journal = "IEEE Transactions on Computers",
	month = "July",
	year = 1981
}

@Article{ SuperBlock93,
	author = "W.W. Hwu and et al",
	title = "The Superblock: An Effective Technique for VLIW and Superscalar Compilation",
	journal = "Journal of Supercomputing",
	month = "March",
	year = 1993
}

@Article{ RegionSched90,
	author = "R. Gupta and M. L. Soffa",
	title = "Region scheduling: An approach for detecting and redistributing parallelism",
	journal = "IEEE Transactions on Software Engineering",
	month = "April",
	year = 1990
}

@inproceedings{ Wall-LimitILP91,
	author = "D.W. Wall",
	title = "Limits of instruction-level parallelism",
	booktitle = "International Conference on Architectural Support for Programming Languages and Operating System (ASPLOS)",
	year = "1991"
}

@inproceedings{ Lam-LimitILP92,
	author = "M. S. Lam and R. P. Wilson",
	title = "Limits of control flow on parallelism",
	booktitle = "International Symposium on Computer Architecture",
	year = "1992"
}

@inproceedings{ EbciogluNicolau89,
	author = "K. Ebcioglu and A. Nicolau",
	title = "A global resource-constrained parallelization technique",
	booktitle = "3rd International Conference on Supercomputing",
	year = "1989"
}

@inproceedings{ novack94mutation,
	author = "S. Novack and A. Nicolau",
	title = "Mutation Scheduling: A Unified Approach to Compiling for Fine-Grain Parallelism",
	booktitle = "Languages and Compilers for Parallel Computing",
	year = "1994"
}

@inproceedings{ Hsu-PredExec-86,
	author = "P. Y. T. Hsu and E. S. Davidson",
	title = "Highly concurrent scalar processing",
	booktitle = "International Symposium on Computer Architecture",
	year = "1986"
}

@Article{ Dehnert-CydraCompiling-Computer93,
	author = "J. C. Dehnert and R. A. Towle",
	title = "Compiling for the Cydra 5",
	journal = "IEEE Computer",
	volume = "7(1/2)",
	year = "1993"
}

@Article{ Rau-CydraHw-Computer89,
	author = "B. Rau and D. Yen and W. Yen and R. Towle",
	title = "The Cydra 5 departmental supercomputer: Design philosophies, decisions, and trade-offs",
	journal = "IEEE Computer",
	volume = "22(1)",
	year = "1989"
}

@inproceedings{ Allen-IfConv-83,
	author = "J. R. Allen and K. Kennedy and C. Portfield and J. Warren",
	title = "Conversion of control dependence to data dependence",
	booktitle = "ACM Symposium on Principles of Programming Languages",
	year = 1983
}

@inproceedings{ Mahlke-PredExec-HyperBlock92,
	author = "S. A. Mahlke and D. C. Lin and W. Y. Chen and R. E. Hank and R. A. Bringmann",
	title = "Effective compiler support for predicated execution using the hyperblock",
	booktitle = "International Symposium on Microarchitecture",
	year = 1992
}

@inproceedings{ Dehnert-Cydra-IfConv-89,
	author = "J. C. Dehnert and P. Y.-T Hsu and J.P. Bratt",
	title = "Overlapped loop support in the Cydra 5",
	booktitle = "International Conference on Architectural Support for Programming Languages and Operating Systems",
	year = 1989
}

@TechReport{ Park-PredExec-HP-TR91,
	author = "J. C. H. Park and M. Schlansker",
	title = "On predicated execution",
	institution = "Hewlett-Packard Software and Systems Laboratory",
	year = "1991",
	number = "HPL-91-58"
}

@PhdThesis{ Mantri-Thesis00,
	author = "S. Mantripragada",
	title = "Branch Optimizations and Instruction Level Parallelism Exploitation for Dynamic Superscalar and {VLIW} Processors",
	school = "University of California, Irvine",
	year = "2000"
}

@inproceedings{ Ebcioglu-BeyondBB88,
	author = "K. Ebcioglu",
	title = "Some design ideas for a {VLIW} architecture for sequential-natured software",
	booktitle = "IFIP WG 10.3 Working Conference on Parallel Processing",
	year = 1988
}

@inproceedings{ Lam-SoftPipe88,
	author = "M. Lam",
	title = "Software pipelining: An effective scheduling technique for {VLIW} machines",
	booktitle = "ACM SIGPLAN Conference Programming Languages Design Implementation",
	year = 1988
}

%End of \section{Parellelizing Compiler Algorithms}

@unpublished{ Bench-HLS-MCNC,
	author = "MCNC",
	title = "Benchmarks for the Fifth International Workshop on {H}igh-{L}evel Synthesis",
	year = 1991,
	note = "Available via anonymous FTP at mcnc.mcnc.org"
}

@unpublished{ Bench-HLS-UCI-95,
	author = "UC Irvine: Dutt and Panda",
	title = "1995 {H}igh-{L}evel Synthesis Design Repository",
	year = 1995,
	note = "ftp://ftp.cecs.uci.edu/pub/hlsynth/HLSynth95"
}

@unpublished{ Bench-HLS-91,
	title = "1991 {H}igh-{L}evel Synthesis Design Repository",
	year = 1991,
	note = "ftp://ftp.cecs.uci.edu/pub/hlsynth/HLSynth91"
}

@unpublished{ Sumit-Cad-Bench-Page,
	author = "S. Gupta",
	title = "Links to Benchmarks useful for research in design of embedded systems",
	note = "http://www.cecs.uci.edu/$\sim$sumitg/CadPages.html\#Bench"
}

@unpublished{ Cmu-Core-Page,
	author = "CMU Low Power Group",
	title = "Benchmarking an open source {DSP} core",
	note = "http://www.ece.cmu.edu:80/$\sim$lowpower/benchmarks.html"
}

@unpublished{ Open-Cores-Page,
	author = "Open Cores",
	title = "Creating a set of open source {IP} cores",
	note = "http://www.opencores.org"
}

@unpublished{ Leon-Sparc-Page,
	author = "European Space Agency",
	title = "Leon: {O}pen Source {SPARC} compatible processor",
	note = "http://www.estec.esa.nl/wsmwww/leon"
}

@unpublished{ UCLA-MediaBench,
	author = "C. Lee and M. Potkonjak and W. H. M.-Smith",
	title = "{UCLA} {M}ediaBench benchmark suite",
	note = "http://www.cs.ucla.edu/$\sim$leec/mediabench/"
}

@inproceedings{ lee97mediabench,
	author = "Chunho Lee and Miodrag Potkonjak and William H. Mangione-Smith",
	title = "MediaBench: A Tool for Evaluating and Synthesizing Multimedia and Communicatons Systems",
	booktitle = "International Symposium on Microarchitecture",
	year = "1997"
}

@unpublished{ Dotty,
	author = "AT\&T Research Labs",
	title = "Graphviz - open source graph drawing software",
	note = "http://www.research.att.com/sw/tools/graphviz/"
}

@unpublished{ Sumit-Cad-Page,
	author = "S. Gupta",
	title = "Links to Embedded System Codesign and {CAD} Research groups, people and projects",
	note = "http://www.cecs.uci.edu/$\sim$sumitg/CadPages.html"
}

@unpublished{ Daly-Cad-Page,
	author = "C. Daly",
	title = "Embedded Systems Internet Resources",
	note = "http://www.compapp.dcu.ie/$\sim$cdaly/embed/embedsys.html"
}

@unpublished{ Sigda-Cad-Page,
	author = "{SIGDA}",
	title = "Sigda's links to {CAD} sites",
	note = "http://sigda.acm.org/Links/CAD\_Sites/"
}

@unpublished{ Dacafe-Page,
	author = "Design Automation Cafe",
	title = "{E}DA Community web site",
	note = "http://www.dacafe.com"
}

@unpublished{ Design-Reuse-Page,
	author = "Design and Reuse",
	title = "System on a chip, {IP} Core Reuse web site",
	note = "http://www.design-reuse.com"
}

@unpublished{ SparkFtpSite,
	author = "Spark Synthesis Benchmarks FTP site",
	note = "ftp://ftp.ics.uci.edu/pub/spark/benchmarks"
}

@unpublished{ LEDAwww,
	author = "Algorithmic Solutions Software GmbH",
	note = "http://www.algorithmic-solutions.com/as\_html/products/leda/products\_leda.html",
	title = "LEDA product page"
}

@unpublished{ Get2Chip,
	author = "Get2Chip Incorporated",
	title = "{G2C} Architectural Compiler",
	note = "http://www.get2chip.com"
}

@Manual{ PentiumProRefMan,
	title = "$PentiumPro^{\tiny \textregistered}$ Programmer's Reference Manual",
	organization = "Intel Inc.",
	address = "http://developer.intel.com/design/pro/manuals/242691.htm",
	note = "Chapter 11"
}

@unpublished{ GimpWWW,
	author = "{GNU} {I}mage {M}anipulation {P}rogram",
	note = "http://www.gimp.org"
}

@inproceedings{ hafer,
	author = "Louis Hafer and Alice C. Parker",
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	booktitle = "DAC '81: Proceedings of the 18th conference on Design automation",
	year = "1981",
	pages = "846--853",
	location = "Nashville, Tennessee, United States",
	publisher = "IEEE Press",
	address = "Piscataway, NJ, USA"
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@article{ formal_approach,
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	year = "1991",
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@article{ saliba,
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@article{ deb00fast,
	author = "K. Deb and S. Agrawal and A. Pratab and T. Meyarivan",
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@techreport{ blickle96systemlevel,
	author = "T. Blickle and J. Teich and L. Thiele",
	title = "{S}ystem-{L}evel {S}ynthesis {U}sing {E}volutionary {A}lgorithms",
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	address = "Gloriastrasse 35, 8092 Zurich",
	year = "1996",
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@article{ stok,
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	pages = "1-71"
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@article{ mandal96design,
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	year = "1996",
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@article{ recent_devel,
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@article{ Hierarchical,
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@article{ papachristou_linear,
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@article{ srinivas94multiobjective,
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@inproceedings{ openbeagle,
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@article{ interconnection,
	author = "D. Chen and J. Cong",
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	pages = "68-73",
	location = "Yokohama, Japan"
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@inproceedings{ ilp_peakpower,
	author = "W.-T. Shiue",
	title = "{H}igh {L}evel {S}ynthesis for {P}eak {P}ower {M}inimization {U}sing {ILP}",
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@inproceedings{ ilp_lowpower,
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@phdthesis{ haynal,
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@article{ cabodi,
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	author = "M. Rim and R. Jain and R. De Leone",
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@inproceedings{ ferrandi,
	author = "R. Cordone and F. Ferrandi and M. D. Santambrogio and G. Palermo and D. Sciuto",
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	year = "2006",
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	pages = "898--904",
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@inproceedings{ wavesched,
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@TechReport{ horn93multiobjective,
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@Article{ zitzler99multiobjective,
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@TechReport{ vanveldhuizen98multiobjective,
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@TechReport{ gajski_function,
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	title = "{F}unction {B}inding in {RTL} {D}esign {M}ethodology",
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@TechReport{ gajski_scheduling,
	author = "D.D. Gajski and Q. Xie",
	title = "{S}cheduling in {RTL} {D}esign {M}ethodology",
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@TechReport{ gajski_interconnection,
	author = "D.D. Gajski and Q. Xie",
	title = "{I}interconnection {B}inding in {RTL} {D}esign {M}ethodology",
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}

@Misc{ panda,
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@Article{ COIN-OR-2001,
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@book{ Nemhauser88,
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@Article{ listbased,
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}

